Sr. Principal Technical Program Manager - Digital IP Development

About the role

NXP's ACE Digital IP develops reusable digital intellectual property and subsystems used across its Automotive, IoT, Networking and RF product portfolios. It is looking for a Senior Principal Technical Program Manager to lead digital IP development from planning through release, driving execution across complex engineering programs and influencing strategy and delivery across several product lines.

Key responsibilities

• Lead digital IP and subsystem development programs from planning through IP release and SoC integration readiness.
• Develop and manage integrated program plans covering scope, schedules, milestones, dependencies, risks, deliverables and release criteria.
• Drive cross-functional execution across architecture, design, verification, validation, software and SoC integration teams.
• Align stakeholders on IP specifications, interfaces, integration dependencies, release content and handoff requirements.
• Support portfolio planning, resource prioritization and execution visibility across multiple programs.
• Drive risk management, issue resolution, decision closure and timely escalation.
• Lead technical reviews, program checkpoints and leadership updates, communicating status, risks, actions and key decisions.
• Build dashboards, KPIs and metrics to show execution health, resource demand and release readiness.

Required profile

• BSEE required; MSEE preferred.
• 12+ years of digital IP, SoC development or technical program management experience.
• Proven ability to manage complex engineering programs across schedules, milestones, dependencies, risks and deliverables.
• Ability to turn engineering and project data into concise executive-level insights, recommendations and action plans.

Required skills

• Understanding of digital IP flows: architecture, RTL design, verification, integration, release management and signoff.
• Dashboards, KPIs and reporting with Power BI, Excel, SQL, Jira, Confluence, Microsoft Project or similar.
• Analyzing schedule performance, resource utilization, risk trends and release readiness data.

Preferred: portfolio planning and resource forecasting, executive dashboards and business intelligence, AMBA/AHB/AXI protocols and memory subsystems, RTL design, verification, timing analysis, DFT, synthesis and signoff, and experience with automotive, industrial, safety or security semiconductor programs. NXP offers online and offline learning opportunities for career development.