Director of SoC Implementation / Physical Design

About the role

NXP is looking for an experienced leader to head SoC Implementation / Physical Design for advanced semiconductor products. The role owns end-to-end physical design execution across complex SoCs, driving delivery from RTL to silicon on aggressive schedules, and manages large global teams.

Key responsibilities

• Lead full SoC physical design: floorplanning, synthesis, place & route, CTS, routing, STA, PDN, PDV and signoff, with timing, power, IR/EM and physical verification closure to tapeout readiness
• Own planning, tracking and execution of physical design programs from specification through tapeout, managing risks, dependencies and schedules across multi-site teams
• Drive cross-functional alignment with RTL, DFT, STA, verification and packaging teams
• Build and lead global physical design teams, handling hiring, mentoring, career development, reviews and performance tracking
• Define next-generation physical design methodologies, automation, flow optimization and tool innovation, and lead adoption of advanced node technologies (5nm and beyond)
• Work with architecture, RTL, verification and product teams, and with EDA vendors and IP providers; support post-silicon bring-up, yield improvement and production ramp

Required profile

• Bachelor's or Master's degree in Electrical / Electronics Engineering or a related field
• 17+ years of experience in ASIC / SoC physical design
• Proven experience leading large-scale SoC programs
• Demonstrated success in advanced node implementations
• Strong leadership, communication and stakeholder management skills

Required skills

• RTL-to-GDSII implementation flow
• Floorplanning, synthesis, PNR, CTS, routing, STA and signoff
• EM/IR, PDN design, signal integrity and physical verification (DRC/LVS/ERC)
• Advanced node implementation (<=16nm / 5nm) and low-power design (UPF/CPF)
• Knowledge of Synopsys and Cadence EDA flows

Preferred: automotive or high-reliability SoC experience, chip-level PDN / EMIR / SI closure, global team leadership across geographies, and exposure to AI-driven design methods and automation.