Cleaning, Contamination Control & Validation Engineer

About the role

The Cleaning, Contamination Control & Validation Engineer partners with Engineering to develop cleaning methods, contamination control solutions, and validation documentation for semiconductor equipment across the product lifecycle.

Key responsibilities

• Develop and qualify cleaning methods and contamination control solutions for current and advanced node equipment.
• Conduct risk assessments (FMEA) and maintain a live risk register across supply chain, manufacturing, and field stages.
• Design, evaluate, and qualify new detection tools and measurement methods, defining acceptance criteria and sampling plans.
• Lead root‑cause analysis for contamination‑related customer escalations and drive corrective actions.
• Author and maintain Contamination Control Plans, Validation Master Plans, and related documentation compliant with SEMI, ISO, and customer standards.

Required profile

• Bachelor’s degree in Materials Science, Mechanical Engineering, Chemistry, Physics or related field.
• 7‑10 years of semiconductor‑related experience, preferably in fabrication environments.
• Experience authoring validation protocols and contamination control documentation.
• Proven ability to lead cross‑functional teams and communicate technical information to non‑technical audiences.

Required skills

• FMEA and risk management frameworks
• Cleanroom protocols and contamination science
• SEMI and ISO standards compliance
• Validation protocol development
• Detection, inspection and measurement methods
• Root‑cause analysis (8D, 5‑Why, fishbone)
• Design of Experiments (DOE) for failure analysis
• Six Sigma, CQE or equivalent quality certifications

What we offer

• Salary range $133,500 – $183,500 per year
• Supportive work culture with opportunities for learning and career growth
• Benefits focused on health, wellbeing, and professional development