Senior System Architect - Advanced Silicon Systems

About the role

AheadComputing is looking for an experienced Senior System Architect to define and drive the architecture of advanced silicon systems. The role focuses on system-level design, IP integration and architectural specifications, enabling next-generation heterogeneous computing solutions on advanced process technologies. It is a senior technical leadership position working with hardware, firmware and software teams and with foundry and design partners.

Key responsibilities

• Define and document system-level architecture, data flows, memory maps and transaction models for high-performance computing systems
• Define system-level requirements including NOC topology, power domains, clock domains and interface specifications
• Coordinate delivery and integration of internal and external IP, including interconnects such as PCIe, DDR, HBM and AMBA CHI NOC
• Work with foundry and design service partners to define Statements of Work (SOWs) and manage technical deliverables
• Define and drive Power, Performance, Area (PPA) targets at chip, subsystem and IP levels
• Collaborate with firmware, software and verification teams to meet functional and PPA requirements
• Represent architecture decisions across teams and mentor junior engineers

Required profile

• MS or PhD in Electrical Engineering, Computer Engineering, Computer Science or a related field
• 8+ years of relevant industry experience in SoC/ASIC architecture, design or integration
• Expert knowledge of SoC architecture and design principles
• Extensive experience defining and documenting system-level architecture requirements and specifications
• Excellent written and verbal communication skills and ability to lead technical discussions with vendors and partners

Required skills

• On-chip interconnect protocols and architectures
• Preferred: RISC-V or Arm CPU architecture, including cache and memory hierarchy design
• Preferred: AMBA Coherent Hub Interface (CHI) and multi-core coherent interconnects
• Preferred: advanced packaging 2.5D/3D integration, chiplets, UCIe, BoW, CoWoS
• Preferred: PCIe, UCIe, DDR/LPDDR, HBM
• Preferred: Python or similar scripting for design automation and analysis

What we offer

• Lead impactful architecture decisions shaping next-generation heterogeneous computing
• Competitive compensation and benefits package
• Opportunities for professional growth in an innovative, fast-paced environment
• A flexible and inclusive work culture based in Portland, OR