ASIC Engineer - Mixed-Signal and Digital

About the role

Falcomm develops energy-efficient RF power amplifier and wireless solutions, turning semiconductor research into real products. It is looking for an ASIC Engineer to support the development of mixed-signal and digital integrated circuits that interface with its RF technologies. The role contributes to the design, implementation and verification of ASIC components within larger system-on-chip platforms, working closely with RFIC, analog, verification and system engineering teams.

Key responsibilities

• Design and implement digital and/or mixed-signal ASIC blocks from specification to tapeout
• Develop RTL (Verilog/SystemVerilog) and/or transistor-level designs depending on focus area
• Collaborate with RFIC, analog and system engineers to integrate digital logic within RF and mixed-signal chip architectures
• Perform synthesis, timing closure and power optimization
• Work with verification engineers to define testbenches and ensure robust design validation
• Support functional verification and debugging of ASIC components
• Assist with synthesis, timing analysis and physical implementation to ensure design readiness for tapeout
• Contribute to silicon bring-up, debugging and post-silicon validation
• Document design architecture, implementation details and verification results

Required profile

• Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, Computer Science or a related discipline
• 1-3 years of experience developing and implementing ASIC designs
• Willingness to work full-time, onsite in Atlanta, GA
• Preferred: hands-on experience with EDA tools, FPGA platforms and scripting languages such as Python or TCL

Required skills

• Strong RTL design (Verilog/SystemVerilog) and/or analog/mixed-signal IC design
• Solid understanding of digital design fundamentals (timing, clocking, power)
• Experience with ASIC tool flows (e.g. Synopsys, Cadence)
• Familiarity with verification methodologies (UVM is a plus)
• Preferred: clock domain crossing, timing optimization, low-power design, HDL simulators, linting tools, FPGA platforms

What we offer

• Competitive salary and equity package
• Health, dental and vision insurance
• 401(k) retirement plan
• Paid time off and sick leave