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Sr Principal AI/ML Driven ASIC Design and Implementation Automation Expert

nxp · San Diego (Treena St)

New
Senior 179,800 - 247,200 USD/year 🇬🇧 English
Python Git BitBucket Unix/Linux System Verilog Verilog VHDL EDA tools CI/CD Jenkins LSF MakeSplunk

Job description

About the role

NXP is hiring a Senior Principal AI/ML Driven ASIC Design and Implementation Automation Expert for its Advanced Chip Engineering (ACE) organization in San Diego. The role explores methodologies, flows and tools to improve power, performance, area and quality for SoC and IP development teams, and connects with AI/ML experts in industry and academia to define tool and feature requirements for ASIC design.

Key responsibilities

  • Develop prototype solutions evaluating state-of-the-art AI/ML techniques to find the best fit for NXP designs, while working on actual designs and implementations to pilot automation.
  • Explore research ideas and solutions that bring AI/ML applications to VLSI design.
  • Work with academic research communities and with Architecture, IP and SoC design, verification and implementation teams across sites to evaluate leading-edge SoC technologies.
  • Apply GenAI, reinforcement learning, graph neural networks and convolutional networks to automation.
  • Drive cross-functional initiatives for digital transformation of automotive processors and advanced microcontrollers.

Required profile

  • BS or MS in Computer Science, Electrical Engineering, Computer Engineering or a related discipline, with a strong software development background.
  • 7+ years of hands-on experience applying AI and ML techniques (LLMs, CNN, RNN, GraphNN) to real-world optimization problems.
  • Strong analytical problem-solving and verbal/written communication skills.

Required skills

  • Programming in Python and C++.
  • Data structures, algorithms and software development for optimization problems.
  • Unix/Linux, Git, BitBucket, software development and debug tools.
  • Desirable: design, layout and constraint knowledge (SDC, clocks, CDC, RDC), static timing analysis, low-power and power-aware flows (UPF).
  • Desirable: VLSI CAD methodology and tool development, HDL (System Verilog, Verilog, VHDL), EDA tools, and CI/CD tools (Jenkins, LSF, MakeSplunk, DesignSync).

What we offer

  • Base salary range of $179,800 to $247,200 per year (California only).
  • Health, dental and vision insurance, 401(k) and paid leave.
  • Competitive benefits, incentive compensation and/or equity for certain roles.

Questions fréquentes

Le salaire proposé pour ce poste est de 180-247k USD par an. Le détail figure dans l'annonce.
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Source : ats:workday

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Published 2 days ago

Expires 1 month from now

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nxp

San Diego (Treena St)