Staff Design Verification Engineer

About the role

Cerebras Systems builds the world's largest AI chip, which delivers training and inference speeds over 10 times faster than GPU-based cloud services. It is hiring a Staff Design Verification Engineer in Sunnyvale, CA, to work with architects, designers, post-silicon and software engineers so that designs work first silicon.

Key responsibilities

• Develop and implement verification strategies, detailed tests and coverage plans based on micro-architecture.
• Create verification methodologies and reusable environments, including stimulus, checkers, assertions and coverage.
• Implement tests, manage regressions, gather coverage and debug test failures.
• Collaborate with architecture, RTL design, physical design, firmware and validation teams.
• Analyze and debug complex issues across simulation, emulation and silicon bring-up phases.
• Improve verification infrastructure and flows, and contribute to the evolution of the verification methodology and best practices.

Required profile

• 10+ years of design verification experience.
• BS or MS in Computer Science or Electrical Engineering (desired).
• Excellent debugging and problem-solving skills, strong programming skills and good interpersonal skills.

Required skills

• SystemVerilog testbench, DPI and UVM.
• Scalable, portable testbenches and components.
• Verification tools: simulators, waveform viewers, build and run automation, coverage collection, gate-level simulation.
• Scripting in Python or Perl.
• Desired: knowledge of pipelined processor architecture.

The base salary range is $225,000 to $270,000 per year, with possible bonus and equity depending on experience, skills and qualifications.