SRAM/ROM Circuit Design Engineer

About the role

NXP's Austin Memories team is looking for an experienced memory circuit design engineer to work on SRAM and ROM internal memory compiler designs. The team sits in the Design Enablement/Foundation IP organization within the Chief Technology Office and provides SRAM/ROM memory compiler solutions to NXP SoC design teams across several business lines.

Key responsibilities

• Design CMOS memory circuits to meet memory compiler performance, power and area requirements, including periphery circuits for functional safety and scan functionality.
• Generate, run and evaluate simulation characterization measurements and test benches, comparing results against performance targets and benchmarks.
• Work with layout teams to implement compiler leaf cells and with CAD teams to bring new designs into characterization, verification and regression flows.
• Align with the modeling and verification team so designs match frontend models (behavioral, ATPG, emulation).
• Collaborate with global memory teams to share common methodologies and best practices.
• Use internally supported LLM/GenAI tools and EDA vendor GenAI solutions to improve design efficiency.

Required profile

• Bachelor's degree in Electrical Engineering, Computer Engineering or a related field (Master's preferred).
• 8+ years of industry experience (6+ with a Master's) in SRAM memory circuit design, including advanced CMOS foundry technologies at 5nm and beyond.
• Good knowledge of scripting languages such as Perl, Tcl or Python is required.
• Creative mindset with strong analytical and problem-solving skills.

Required skills

• Strong familiarity with Cadence Virtuoso and other industry-standard EDA tools.
• Familiarity with automotive design rules and memory design requirements is a plus.

The position is based at NXP's Austin, Texas offices, with at least three days per week spent in the office.