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Principal Digital Design Engineer - PMIC

nxp · Chandler (Office)

New
Senior 🇬🇧 English
Verilog SystemVerilog RTL design UVM Formal verification Cadence Synopsys Siemens EDA Static timing analysis DFT

Job description

About the role

NXP is looking for a Principal Digital Design Engineer in its Chandler office to lead the digital architecture, design, verification and implementation of next-generation Power Management ICs (PMICs) for automotive and industrial applications. The role drives product execution from concept through RTL development, integration, silicon validation, qualification and production release, working with analog, verification, validation, subsystem, SoC, applications, systems, product definition and customer-facing teams.

Key responsibilities

  • Review product requirements, IP architecture specifications, programming models, microarchitecture, interfaces and implementation plans for automotive and industrial PMIC applications.
  • Define and implement digital architectures for mixed-signal PMICs aligned with system, performance, quality, reliability, safety, power and area requirements.
  • Lead digital design from architecture through RTL development, integration, synthesis, timing closure, low-power implementation, silicon bring-up and production release.
  • Develop digital control, monitoring, telemetry, diagnostics, configuration, protection, power sequencing and fault management functions for PMIC and power conversion products.
  • Drive verification strategy and execution, including test planning, simulation, formal verification, coverage analysis and regression management, meeting NXP quality and maturity standards.
  • Deliver complete IP solutions with RTL, verification collateral, documentation and requirements traceability.
  • Track development metrics such as milestones, code and functional coverage, defect resolution and compliance with design requirements.
  • Support silicon debug, characterization, qualification, reliability validation and production ramp.
  • Mentor junior engineers and improve design methodologies, automation flows and engineering best practices.

Required profile

  • M.S. in Electrical Engineering, Computer Engineering or a related field.
  • Minimum 12 years of experience in digital IC design and development, including technical leadership and architecture responsibilities.
  • Experience developing digital controllers for PMICs, power management systems, automotive electronics or industrial applications is highly desirable.
  • Strong analytical and problem-solving skills, and excellent written and verbal communication skills for leading cross-functional teams.

Required skills

  • RTL design in Verilog/SystemVerilog for complex digital and mixed-signal ICs.
  • Knowledge of digital design fundamentals, finite state machines, clock-domain crossing, reset architecture and low-power design.
  • Experience with synthesis, static timing analysis, equivalence checking, DFT and physical implementation flows.
  • Modern verification methodologies including UVM, assertions, formal verification and coverage-driven verification.
  • EDA tools from Cadence, Synopsys and Siemens EDA.

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Published 1 day ago

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nxp

Chandler (Office)