Principal Analog Mixed-Signal Verification Engineer

About the role

NXP is looking for a Principal Analog Mixed-Signal Verification Engineer based in Chandler, Arizona. The role leads analog and mixed-signal verification for automotive and industrial PMIC products, from specification through verification signoff, defining strategies, environments, regressions and coverage objectives for complex mixed-signal IPs, subsystems and SoCs.

Key responsibilities

• Review product requirements, architecture specifications, design documentation, programming models, interfaces and implementation plans for automotive and industrial PMIC applications.
• Define and execute AMS verification strategies aligned with system, performance, quality, reliability, safety, power and functional requirements.
• Lead AMS verification activities, including plans, methodologies, environments, regressions, documentation, schedules, coverage objectives and milestone tracking.
• Develop and validate mixed-signal simulation environments, behavioral models, checkers, assertions, scoreboards and reusable components using Verilog-AMS, SystemVerilog, UVM and RNM.
• Drive verification execution through test planning, constrained-random verification, simulation, coverage analysis, regression management, debug and signoff.
• Bridge digital and mixed-signal verification flows and verify digital control, monitoring, telemetry, diagnostics, configuration, protection, power sequencing and fault-management functions.
• Track development metrics such as milestones, code and functional coverage, defect resolution and requirements traceability.
• Improve methods to increase simulation efficiency, reuse, quality, productivity and cost effectiveness, and mentor junior engineers.

Required profile

• M.S. in Electrical Engineering, Computer Engineering or a related field.
• Minimum 10 years of experience in analog and mixed-signal IC verification and development, including technical leadership.
• Strong understanding of analog and mixed-signal circuits, including PMICs, DC-DC converters, LDOs, ADCs, DACs, PLLs, voltage references, bandgaps and sensor interfaces.
• Expertise in AMS verification with Verilog-AMS, SystemVerilog, UVM, assertions, mixed-signal simulation and RNM.
• Experience building behavioral models and reusable verification environments for complex mixed-signal designs.
• Knowledge of coverage-driven verification, constrained-random verification, regression automation and signoff; formal verification, low-power verification and requirements traceability are highly desirable.
• Proficiency with EDA tools from Cadence, Synopsys and Siemens EDA; scripting with Python, Perl, Tcl or Shell is an advantage.
• Proven ability to lead cross-functional teams and communicate clearly.