Physical Design Engineer II (RTL2PD)

About the role

eInfochips, an Arrow company, is hiring a Physical Design Engineer II for its RTL-to-physical design (RTL2PD) ASIC position. The role is fully on-site in San Jose, California, and requires the ability to travel to an Arrow client office location as requested by client leadership.

Key responsibilities

• RTL to physical design (RTL2PD) work for ASIC designs
• RTL synthesis, constraint writing, validation and static timing analysis
• Write and modify scripts for RTL synthesis and SDC creation
• Debug synthesis issues and STA, and generate clean netlists

Required profile

• 8 to 12 years of hands-on RTL synthesis experience
• Bachelor's degree in electronic engineering or equivalent qualification in training and experience
• Experience with multi-node designs such as 16nm, 7nm and similar nodes

Required skills

• RTL synthesis and static timing analysis
• Design tools: Design Compiler, PrimeTime, Tempus, Genus, Innovus

What we offer

• Medical, dental and vision insurance
• 401k with matching contributions
• Short-term and long-term disability insurance
• HSA/HRA options and paid time off
• Tuition reimbursement and growth opportunities