Hardware Engineer, Lead Architect

About the role

Normal Computing is building a next‑generation AI accelerator that dramatically improves energy efficiency for large language model and diffusion inference. As the Hardware Lead Architect you will define the silicon and system micro‑architecture of this unconventional compute platform, guiding trade‑offs that unlock 100–1000× gains over traditional digital chips.

Key responsibilities

• Define compute architecture, including PE array design, datapath organization, and efficiency techniques such as sparsity and reduced‑precision.
• Translate AI workload analysis into concrete hardware specifications and micro‑architecture documents for RTL implementation.
• Make full‑stack power‑performance‑area (PPA) decisions across algorithm behavior, memory hierarchy, interconnect, and physical design.
• Co‑design the instruction set architecture (ISA) together with the compiler team.
• Lead pre‑silicon validation, selecting appropriate FPGA or emulation platforms to de‑risk decisions before tape‑out.

Required profile

• Proven experience in silicon micro‑architecture and hardware/software co‑design for AI accelerators.
• Strong ability to work across hardware, compiler, and analog teams, translating research concepts into silicon.
• Excellent analytical skills to evaluate PPA trade‑offs under incomplete data.

Required skills

• Silicon design and micro‑architecture
• RTL development
• FPGA prototyping
• Analog hardware design
• ISA and compiler co‑design
• Performance modeling and PPA analysis