Digital Design Engineer, DFT

About the role

Analog Devices is hiring a Digital Design Engineer focused on DFT (Design for Test) in its Tollway office. The engineer works on DFT specifications, architecture and implementation, supports several product lines and works both independently and in teams. About 10% of the time travel is required, and the shift is first shift, days.

Key responsibilities

• DFT specifications, architecture and implementation using state-of-the-art methodologies and tools
• Support various product lines for DFT insertion
• Support various product lines for high coverage, low power, low test time scan patterns
• Pre- and post-silicon verification and debug

Required profile

• Masters of Science degree in Electrical Engineering, Computer Engineering or similar
• 2 years of directly related experience in ASIC/SoC DFT
• Ability to work independently and in teams, with strong written and verbal communication skills
• Export licensing review may be required for non-US citizens or permanent residents

Required skills

• Good understanding of DFT architecture and planning
• Hands-on scan insertion and ATPG tool experience
• Hands-on DFT compression insertion and on-chip clock control insertion
• Gate-level simulation with zero delay and SDF
• Failure analysis
• Scripting in Perl, Python or Tcl
• Preferred: Tessent DFT tools, IEEE 1149 and JTAG, LBIST and MBIST, and advanced DFT technologies such as low power, SSN and fault grading