Associate Design Verification Engineer

About the role

Analog Devices is hiring an Associate Design Verification Engineer to verify digital, analog and mixed-signal integrated circuits before tape-out. Working under the guidance of experienced engineers, you will develop test benches, run verification plans, analyse simulation results and support coverage-driven verification. The role suits recent graduates and offers exposure to modern verification methods and semiconductor product development.

Key responsibilities

• Develop and run test benches for digital and mixed-signal verification using SystemVerilog
• Create and maintain functional and coverage-driven verification environments
• Write directed and constrained-random test cases
• Analyse code and functional coverage
• Debug simulation failures and identify design issues
• Work with design engineers on requirements and implementation accuracy
• Support verification planning, documentation and design reviews
• Use scripting and automation to speed up verification
• Contribute to mixed-signal simulation and behavioural modelling where applicable

Required profile

• Bachelor's degree in Electrical, Electronics, Computer Engineering, Computer Science or a related field
• 0-2 years of experience in digital design verification or a related field; new graduates with relevant projects, internships or coursework are encouraged to apply
• Ability to solve problems and debug in a team setting

Required skills

• SystemVerilog and digital verification, including test bench development and simulation-based verification
• RTL design fundamentals
• Coverage-driven verification and structured verification practices
• Scripting with Python, Perl or Tcl
• Knowledge of I2C, SPI, UART or similar protocols
• Preferred: UVM, constrained-random verification, SVA, EDA simulation tools, mixed-signal simulation, analog behavioural modelling or OOP concepts