Technical Program Management Director

About the role

Applied Materials is hiring a Technical Program Management Director in Santa Clara, CA, to act as the central orchestrator of large, complex module programs spanning Logic and Memory business units and key strategic customers such as Samsung, SK Hynix, Micron and Intel. The role combines technical depth in semiconductor process technologies, business acumen and executive-level communication, driving programs from concept through high-volume manufacturing enablement.

Key responsibilities

• Lead end-to-end program management for strategic customer engagements, including Technology Review Meetings, yield improvement task forces and cost reduction initiatives
• Prepare and present executive materials for meetings with customer VPs, CTOs and internal senior leadership
• Drive alignment across multiple business units, integrated development teams and cross-functional teams through weekly and monthly reviews
• Coordinate program execution across US headquarters and international sites (Korea, Japan, Taiwan)
• Identify and retire program risks, lead trade-off assessments and critical-path analysis
• Maintain disciplined program cadence with meeting minutes, action tracking, milestone reporting and executive status updates
• Partner with business development and strategy teams on new module opportunities and demo priorities

Required profile

• BS/MS in Electrical Engineering, Materials Science, Chemical Engineering, Physics or a related semiconductor discipline; PhD preferred
• 12+ years in the semiconductor industry, including at least 5 years in technical program management, business management or engineering leadership
• Proven track record managing programs with major semiconductor manufacturers at the VP/Director level and above
• Strong written and verbal communication, able to turn complex technical topics into executive summaries and customer presentations

Required skills

• Working knowledge of semiconductor process technologies such as DRAM, Logic/Foundry nodes, BEOL integration, FEOL device engineering, etch, deposition and module integration
• Rigorous schedule, budget and risk management
• Preferred: experience in semiconductor equipment or materials companies, PDP frameworks, phase-gate methodologies and tools such as Accolade/PDBoK
• Bilingualism (English/Korean, Mandarin or Japanese) strongly preferred

What we offer

• Salary of $172,000 to $237,000
• Full-time position, with travel of about 10% of the time and relocation eligibility
• Comprehensive benefits package, with possible bonus and stock award program participation