Staff Design Verification Engineer

About the role

Analog Devices is looking for a Staff Design Verification Engineer to provide technical leadership in developing verification strategies for its most complex analog and mixed-signal designs. You will architect sophisticated verification environments, mentor junior engineers and collaborate across organizational boundaries to ensure product quality and reliability. Working with limited direction, you will represent the company with key customers and industry partners.

Key responsibilities

• Architect and lead the verification strategy for complex digital and mixed-signal designs
• Design and implement UVM-based verification environments with comprehensive test coverage
• Mentor and guide junior engineers and model professional behavior
• Coordinate work across teams with design teams on verification requirements and sign-off criteria
• Lead complex debugging across RTL and gate-level simulations with minimal direction
• Drive functional and code coverage closure
• Lead post-silicon validation and act as principal customer contact on projects

Required profile

• MS/PhD in Electrical Engineering, Computer Engineering or a related field
• 7-10+ years of digital design verification experience, with emphasis on mixed-signal verification
• Ability to influence verification direction and drive methodology adoption
• Willingness to travel about 10% of the time; first shift, days

Required skills

• Expert SystemVerilog and UVM
• Detailed mixed-signal design and verification knowledge
• Advanced debugging across RTL and gate-level simulations
• Cadence/Synopsys EDA tools and formal verification
• Python, Perl, TCL or Shell scripting for verification automation