High Speed Photonic Integrated Circuit Designer

About the role

Mesh Optical Technologies is seeking a High Speed Photonic Integrated Circuit Designer to lead the design, simulation, and tape‑out of advanced electro‑optic modulators and photonic circuits. You will work across silicon photonics and III‑V platforms to deliver production‑ready transmitters for coherent and direct‑detect systems.

Key responsibilities

• Design, simulate, and optimize high‑speed electro‑optic modulators and integrated photonic circuits on silicon photonics and III‑V platforms (e.g., InP/InGaAsP).
• Drive end‑to‑end photonic tape‑outs, including circuit design, DOE planning, layout, foundry interfacing, and coordination with packaging and driver teams.
• Develop and maintain device, circuit, and system models using tools such as Lumerical Mode/FDTD/Interconnect, BeamPROP, HFSS, ADS/Ansys Designer, and VPI.
• Lead RF, signal‑integrity, and high‑speed interconnect design from die to carrier/package/PCB, co‑designing chip, carrier, and RF package.
• Partner with driver and packaging suppliers to optimize impedance matching, bandwidth, voltage swing, and power/thermal performance.
• Define design‑for‑test strategies and work with test teams to execute high‑volume characterization and validation.
• Analyze measurement data (EO S‑parameters, eye diagrams, mask margin, RIN, chirp) and correlate with models for root‑cause analysis.

Required profile

• Master’s or PhD in electrical engineering, applied physics, optical engineering, or a related discipline.
• Minimum 3 years of industrial experience in integrated photonics, including design and modeling of passive and active components.
• Proven experience designing high‑speed photonic devices (10 GHz bandwidth or higher) and familiarity with transmitter architectures such as PAM4 and coherent formats.

Required skills

• Lumerical Mode, Lumerical FDTD, Lumerical Interconnect
• BeamPROP
• HFSS
• ADS / Ansys Designer
• VPI
• RF design and signal‑integrity analysis
• High‑speed interconnect and impedance‑matching design
• Silicon photonics and III‑V platform knowledge (InP, InGaAsP)