Design Verification Engineer

About the role

Normal Computing is an applied AI company building hardware and software for the semiconductor industry. As a Design Verification Engineer you will lead verification of its novel physics‑inspired ASICs, ensuring they meet quality standards before tape‑out and supporting AI‑driven verification flows.

Key responsibilities

• Develop and maintain testbench environments, assertions and functional coverage for internal ASIC projects from specification through tape‑out.
• Review and refine AI‑generated verification collateral, defining rubrics and curating golden examples for model training.
• Collaborate with ML and product teams to shape verification tool usability and data quality.
• Support customer deployments by validating AI‑generated verification assets against real specifications.
• Set up, evaluate and maintain EDA tools on shared compute resources for internal and customer use.

Required profile

• 5+ years of digital verification experience in a semiconductor or EDA environment.
• Strong communication skills and willingness to engage with customers, including occasional travel.
• Ability to work independently and drive verification quality across hardware and AI domains.

Required skills

• SystemVerilog
• UVM methodology
• EDA verification tools such as vManager, Xcelium, Jasper
• Python or Perl scripting

What we offer

• Opportunity to work on cutting‑edge ASICs that compute differently.
• Collaboration with leading AI and hardware teams across multiple global locations.
• Competitive compensation and benefits package.