Principal FPGA Image Pipeline Engineer

About the role

Alcon is seeking a Principal FPGA Image Pipeline Engineer to lead the development of next‑generation surgical cameras for eye surgery. The role is based in Goleta, CA and focuses on translating advanced image‑processing algorithms into high‑performance FPGA implementations.

Key responsibilities

• Develop image‑processing pipelines on FPGA using High Level Synthesis (HLS).
• Translate algorithms from C/MATLAB to FPGA fabric and continuously improve them.
• Design FPGA logic in VHDL/Verilog, write testbenches, and close timing.
• Interface FPGA with high‑resolution image sensors, temperature sensors, flash memories, and other peripherals.
• Program embedded processors in C and test systems via UART/RS‑232, JTAG, oscilloscopes, and logic analyzers.
• Develop firmware following Agile methodology, use version control, and conduct code reviews.
• Create host‑computer test tools or scripts in C/C++ or Python.
• Collaborate with customers, suppliers, and vendor field application engineers.

Required profile

• Bachelor’s degree or equivalent experience.
• Fluent English communication skills.
• Minimum 5 years of relevant experience in FPGA and embedded system development.
• Strong background in HLS‑based FPGA design, finite‑state machines, and timing closure.

Required skills

• FPGA
• High Level Synthesis (HLS)
• VHDL
• Verilog
• C
• C++
• MATLAB
• Python
• UART
• RS‑232
• JTAG
• Agile Design Methodology
• Git (version control)
• Xilinx ISE
• Xilinx Vivado
• Altera Quartus
• Microchip LiberoSoC
• FPGA simulation tools
• Image sensors
• Embedded processors