Member of Technical Staff, GPU Kernels

About the role

SF Tensor is building the fastest GPU compiler in the world and needs a Member of Technical Staff to push the envelope of what hardware can achieve. You will hand‑write and optimize kernels for pre‑training, post‑training and inference across multiple architectures, then translate those insights into structures the compiler can explore automatically.

Key responsibilities

• Write and hand‑optimize kernels for real workloads to establish performance ceilings.
• Profile at the micro‑architectural level, analyzing SM/CU utilization, warp stalls, memory bank conflicts, register pressure and occupancy.
• Debug down to clock‑level behavior, thermal throttling and driver paths.
• Convert hard‑won knowledge into machine‑searchable structures for the compiler.
• Work below PTX at the ISA level, reasoning about SASS and cubins to emit schedules PTX cannot express.
• Build performance models, micro‑benchmarks and tooling to predict kernel behavior.
• Collaborate with the formal correctness team to attach proofs to aggressive kernels.

Required profile

• Proven track record of hand‑writing kernels that match or exceed vendor libraries.
• Comfortable reading PTX, SASS, GCN/CDNA ISA or equivalent low‑level assembly.
• Fluent with low‑level profiling tools such as Nsight Compute, Nsight Systems, rocprof or omniperf.
• Strong systems programming skills in C++ and CUDA or ROCm/HIP, with understanding of how high‑level ML maps to hardware.
• Ability to translate kernel insights into compiler‑searchable representations.

Required skills

• C++
• CUDA
• ROCm/HIP
• PTX
• SASS
• GCN/CDNA ISA
• Nsight Compute
• Nsight Systems
• rocprof
• omniperf
• LLVM
• MLIR

What we offer

• Base salary range $285,000‑$315,000 per year, plus equity and benefits.
• Relocation assistance and a collaborative onsite environment in San Francisco.
• Opportunity to work on frontier‑scale AI infrastructure and influence the future of compute.